Hi, I'm

Poorna Gunathilaka

PhD Student | HPC & Compiler Engineer | Systems Developer

Exploring high-performance computing, compiler optimization, and heterogeneous systems at Virginia Tech. Passionate about building efficient software that scales.

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About Me

I’m a PhD student in Computer Science at Virginia Polytechnic Institute and State University, focusing on High Performance Computing, Compiler Optimization, and Heterogeneous Systems.

With a strong background in compiler engineering from my work at WSO2, I’m passionate about building efficient systems that leverage modern hardware capabilities like GPUs and accelerators. My research interests span MLIR, OpenMP, SYCL, and GPU portability frameworks.

Beyond research, I’m an avid blogger and open-source contributor.

Technical Skills
  • C++ / C
  • CUDA / HIP
  • Python
  • LLVM IR & MLIR
  • TableGen
  • WebAssembly
  • OpenMP / SYCL
  • MPI / GraphBLAS
  • Linux & DevOps
  • Git / Docker / CMake

Professional Experience

PhD Student - Computer Science - Virginia Tech
Aug 2025 - Present
Conducting research on adaptive work-sharing for CPU-GPU systems using SYCL and OpenMP offloading. Developing metamorphic optimization testing for MLIR. Focus: High Performance Computing, Compiler Optimization, Heterogeneous Systems.
Software Engineer / Compiler Engineer - WSO2 Lanka Private Limited
Jul 2023 - Aug 2025
Managed the end-to-end lifecycle of the WSO2 Streaming Integrator platform. Developed a VS Code extension to visualize integration flows. Contributed to the Ballerina compiler with improvements to XML operations, type checking, and runtime.
Compiler Engineering Intern
Dec 2021 - Aug 2022
Developed a WebAssembly backend for the Ballerina native compiler (nBallerina). Implemented runtime subtyping and leveraged garbage collection and exception handling experimental features of WebAssembly.
Open Source Contributor - Google Summer of Code
2022
Contributed to Google’s Carbon Language, resolving a fuzzer runtime bug and improving compiler infrastructure.

Education

Aug 2025 - Present
PhD in Computer Science
Virginia Polytechnic Institute and State University

Focus Areas:

  • High Performance Computing
  • Compiler Optimization
  • Heterogeneous Systems (CPU-GPU)
Aug 2018 - Jul 2023
B.Sc. Engineering (Hons) in Computer Science
University of Moratuwa

Key Projects

MLIR StableHLO Fuzzing JAX
Metamorphic Optimization Testing for MLIR
Developing a fuzzer for the StableHLO dialect in MLIR. Automated the JAX → LLVM IR pipeline to detect optimizer bugs via metamorphic transformations.
SYCL OpenMP GPU Computing Scheduling
CoreTSAR / Heterogeneous Scheduler (PhD Research)
Investigating adaptive work-sharing for CPU-GPU systems using SYCL and OpenMP offloading to balance workloads dynamically based on runtime metrics.
HIP GPU GraphBLAS Performance Tuning
NOMP: GPU Portability Framework
Developed a HIP backend for the NOMP framework to enable portable execution on AMD GPUs. Integrated GraphBLAS kernels and tuned performance to match native CUDA.
C++ x86 Assembly Emulation
x86 Instruction Emulator
Built a functional C++ emulator for x86 instructions, handling memory addressing modes and flag registers.
WebAssembly Ballerina Compiler
WebAssembly Backend for Ballerina
Developed a WebAssembly compiler backend for the Ballerina programming language, enabling it to run in web browsers and edge environments.

Get In Touch

Feel free to reach out to me via email or connect on social media. I’m always interested in discussing compilers, HPC, and systems engineering.
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